Q1: I cannot
get a trace to & Quot;bind & Quot; to a via in the same way as EED3. When I move the trace,
the end of the wire will pull away from the via instead of rubberbanding with the via even
when F9 option is enabled.
With F9 option enabled, the traces should rubberband with a via. The usual procedure for
creating vias is as follows:
Let us assume that you are routing between two terminals; one on the Comp. Side and the
other on the Sold side. Select the first function tool 'Route Trace' and start routing.
Invoke F6 option tool to create a via and switch to the other placement layer. Join the
trace to the other terminal and end the creation. Now if any other trace has to be
connected to this via, enable the option tool F9 and then connect resulting the trace
being bound to the via. This may be verified using the tool Relocate trace segment. There
is only one instance in which the trace is not bound to the via to which it is connected.
This is when you create an independent via using the Relocate/ Create change single via
tool and then connect a single trace to it; the trace will not be bound to it. However if
you connect a trace from another layer to it, the traces will get bound to the via. This
is because EDWin32 assumes that a via comes into effect only when a connection is to be
made between pins on two different layers.
Q2: How can I place Pads on the PCB in the
layout editor?
EDWin32 does not permit placing pads on the PCB. Instead, it provides two intelligent
solutions for this.
1) EDWin32 defines 7 via pads. You can edit these via pads to suit the requirements of
your pads. To do this proceed as follows:
Select the via pad to be edited from the Viapad combo box. Now select Edit Via
padstack. An Edit Via padstack window pops up. Set the hole category, hole
diameter, airgap and padstack sizes to suit your requirements and click ACCEPT. Similarly
edit other via pads to match the different padstacks you need to use. If you need SMD pads
disable the padstack in all the internal layers by setting the pad size in all internal
layers to 0.
To place these edited via pads, first select the viapad from the Viapad combo box.
Now select Relocate/ Create/ Change Single Via and option tool Create Single Via
(F1). First, click on the graphics area to get a via pad tagged to the cursor. Move the
cursor to the required location and click to place it. In this way you can place pads on
the PCB. This is one way of solving your problem. But this will allow you to use only 7
pads.
2) If your intention is only to place a cluster of pads you can do this in the following
way. Create a new package in Library Editor. You can create a rectangular outline and
place all the pads of different shapes and sizes you need inside it. Now in Layout Editor,
load this package and place it on your PCB. This process is illustrated by the following
demo.
Q3: How can I make a via a part of a net to
use it for the plane fill option? I want a via connected to a net without having to attach
a trace to it.
This may be achieved in any of the following ways.
Method 1)
Start a trace (don't move) click once again there and change layer or create via (F6) and
click once again there. You find a via placed belonging to a net without actually having a
trace coming to it.
Method 2)
By changing the value of the Airgap of the Trace to 0.0& Quot;. This may be done as
follows.
1. Set the Airgap value in the parameter window to 0.0& Quot;.
2. Invoke F2 option tool under Change Trace/Trace Segment Size.
3. Now click on the trace segment. Using Display Trace net info function tool, the airgap
may be verified.
Remember to reset the value of the & Quot;Agap& Quot; to the original value.
Q4: How the viapad placed and its interior
hole diameter be changed?
To change the hole diameter of a particular via proceed as follows:
1. Using the listbox, Viapad select one among the seven viapads.
2. Select Edit/Via Padstack. The details regarding the selected viapad get listed
in the window that pops up. Make the necessary changes here so as to meet the requirements
regarding hole diameter, pad size on each layer, shape etc. Accept the changes.
3. In Edit/ Traces-mode select, Relocate/Create/Change Single Via and its
option F4 (Change via padstack).
4. Click at the edge of the via. The viapad for that via gets changed to the newly
selected one.
Q5: How can I add text outside the board
outline, indicating layer of the particular artwork, to my PCB design?
You can add text to the PCB design so as to indicate the layer of that particular artwork.
Create the required text as follows: Select -Layout/Edit/Texts/Create Edit Text Block.
Click on the graphics area. Type the text in the window that pops up and place it outside
the board outline. (before creating the text, you may select its placement layer using the
menu, Layer. The placement layer of an already created text may be changed using the
function tool Change Text Placement Layer). Now, in the Postprocessing module,
generate the GBR file for the particular layer. Preprocess the GBR file to an artwork
file. Now in Edit/ gerber view you may view the text created placed above the board. In
case a text string which is not needed in the artwork, but only to appear on the screen,
use Edit/Notes in the Postprocessing module
Q6: Will a click on an incomplete trace result
in a finish of that trace (as it should) or does it make a new trace with all the possible
errors involved?
EDWin32 will assume a click on an incomplete trace as a new trace element.
Q7: What are branches?
Branches refer to the portions of a single net that have got split into two or more parts.
On connectivity check the branches of the faulty net will be listed.
Q8: Can you define Channel Width .How can I do
the clearance check? If I have a 10 mil trace, and a channel width of 25 mils, what will
be clearance to the next trace?
Channel width of a trace simply means that the system should reserve an area for that
trace. i.e., if you have a 10 mil trace, and a channel width of 25 mils, 12.5 mils (25/2)
will be reserved on either side of the trace.i.e. a total of 12.5+10+12.5 mils will be
reserved for the trace.
Q9: How can I locate the center of the
padstack for the purpose of routing ? Can I use a full screen cross on the cursor?
At present you can't use a full-screen cross cursor in EDWin32. Switch off the True
size and then route the trace. Another method to confirm the selection of the pad is
to use F3 option tool.
This option allows only pin to pin routing. To continue with free routing, disable F3
while routing and enable F3 at the time of connecting to the pad.
Q10: In the Layout Design, setting the value
of Agap in the specific combo box to a desired value does not seem to generate an error
when two traces come closer than the specified AGAP setting although such an error is
visible on the screen. What does AGAP do and what is it for?
Agap is the minimum electrical insulation required for a trace or pad. Only the traces
currently being routed take the Agap value that has been set in the Agap combo box. All
other traces continue to take the default Agap setting.
In order to change the default setting of Agap to the one desired, select Options
from the main menu of EDWin32 and choose Sizes/ Conductors from the drop down list.
An EDWin32- Conductor Widths & Sizes (Default) window appears. Here, the airgap
widths for trace segments, Round & square pads can be set. Once the ACCEPT button is
clicked, these values will be considered as default settings for the entire database.
Q11: How can you display the ratsnest of the
net being currently routed?
The function tool 'Route Trace' in the Layout Editor has an option 'Display nodes of
current trace net'(F8). If this option is selected while routing, the nodes of the
currently routed net will be marked. A better way to identify the unconnected nodes of the
trace being routed is to check the menu option Preferences/ Guidelines [Next unconnected
node]. Preferences/ Guidelines [Net] shows the ratsnest for the net being routed.
Q12: If (on a multilayer print) a
T-connection is generated to an existing via, an additional via will be generated at
(almost) the same place. Sometimes EDWin32 will generate even three or four vias for no
apparent reason. Why does EDWin32 generate multiple vias in one place?
You may be doing the wrong procedure. While connecting a trace to a via, EDWin32 will ask
for merging the nets. Make sure that you have connected the trace to the via. First
generate a via in a trace (by using F6 or F7 to move to a different layer while routing
the trace). Next start routing a trace in a different net, with F9 'Allow
T-connections' enabled. When the via is clicked, EDWin32 asks whether to merge the
nets, click 'Yes'. Now if a new trace is created on a third layer, i.e., different from
the layers on which the previous two traces were created. EDWin32 creates a second via at
the crossing point of these traces either over the first via or .1 mm away from it,
depending on the position of the crossing over point.
Q13: I created a part and included in the
PART library. It was then used during construction of an EDWin32 database. During
clearance test, this part generates an error & quot;pad/item too close& quot;. Everything in
this file is in the same net. Can you explain the reason for such an error?
Here, the component outline that you created has been considered as a copper item. You
must have created the component outline in one of the routing layers, i.e., component
layer or solder layer. If copper items are created in any of the routing layers, the DRC
check program considers this as a foreign copper and will generate an error. Thus, all
copper items must be created in the print layers , i.e. component print or solder print
layers.
Q14: With Edwin32 and View / true size on, I
appear to be unable to select a via which has already been place on the PCB. If I turn
true size off then selecting a via on the layout is no problem.
To select a via, you have to click on it's periphery, whether true size is on or off.
Q15: I have a board with several hundred pads
and I want to change their size graphically. Can you please tell me how to do this without
deleting and recreating them all?
For this you have to make changes in Packages. Select a symbol to edit (EDWin32 Main ->
Library ->Package -> select the symbol and click on Edit button). For changing the
padstacks select the tool & quot;change padstack & quot; (last tool) and its option tool F1
or F2. Option tool F1 is used to select an existing padstack in any padstack library.
After selecting F1 click on the work area, will pop up a window & quot;select
padstack & quot;. Click on the required padstack and click on Select button. Then click on
the required padstack in the Package to change it to new one. Block select for multiple
replacing with new padstack.
or
Option tool F2 is used for create a new one. Click on the work area, will pop up a
property window & quot;Create padstack& quot;. Enter the values and click on Accept. Then
click on the required padstack in the Package to change it to new one. Block select for
multiple replacing with new padstack.
Edit -> End Edit will make changes for pads in Layout modules.
Q16: How do I reduce or change the size of
via?
There is a menu item in Layout editor by which you can reduce the size of via which you
are using. Select this from Edit-> Via padstack. This will display you a window to edit
the selected via pad. EDWin32 provides you 7 type of vias. If you want to edit a
particular via then first select this via from the parameter window and invoke this
Edit->Viapadstack menu. Change the dimension and accept it. Make True size ON to view
the change.
Q17: I am having difficulties with the manual
routing of traces in the Layout portion of Edwin32. Enforcing orthogonal traces seems to
be quite difficult. When switching into the Router it complaints of non-orthogonal traces.
Am I missing something or is there some secret?
Auto router deletes all prerouted non orthogonal traces (traces having bending
points other than in 90°). So route all necessary traces in 90° and load to the
autorouter.
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