PCB wirelist is the layout information of a board in netlist format. This option is used to import the wirelist files (*.wrl) and can be used to construct the project database. The dictionary file and the location where the import file resides are browsed using the ellipsis. To import the contents, click the import button. This action clears the current loaded database. The report file is displayed in an ASCII viewer. We have included few new features in the PCB Wirelist Export/ Import option. It is now able to export board datum location, board details and position of each component. The board details include the XY coordinates of each vertex of the board. The component position includes the name of component, placement side on the board (top or bottom) for each PCB component and X, Y coordinates of pin #1 and pin #n. While importing the wrl file for reconstructing the project database, the board datum location is used to load the position of board. Each PCB components are placed according to the data retrieved from the PCB wire list file: position, placement layers and orientation. Board with poly shape can now be exported and imported.
Open the PCB wire list file in notepad or in file viewer and write the comments starting with a semicolon (;).
The net/ pin connection in the layout can be automatically mapped to the schematic in EDWinXP. If you provide the schematic wirelist (.wrl file format), we can recreate the schematic from this wrl file, since EDWinXP automatically detects the corresponding schematic pins/ connections from the layout information. So generating the wrl file will be the best idea to recreate the schematic. You want to have the wrl file format compatible to EDWinXP. And the board information is to be exported to the wrl file format so that it can be reverted in EDWinXP. In EDWinXP, the Netlist/ Wirelist Export/ Import can be performed by the following formats.
Import of PCB layout wirelist (COUNTER(PCB layout format).wrl).- Our project database is integrated, meaning that once component is added
to the PCB layout, its schematic equivalent is automatically created. It applies to netlist too. The netlist is common for PCB and schematic view. This feature allows reconstructing schematics from PCB layout wirelist (and list of components there). For example – if in PCB wirelist we find 7400 component named IC1, we know that we have to add four NAND gates symbols to the schematics, packaged as IC1/1, IC1/2, IC1/3, IC1/4. Numbers after “/” denote gate numbers in the package. Pin-out information specified in 7400 part description stored in our library allows for translating package pin numbers to pin numbers in gate symbols on the schematics. Reconstruction of schematics from PCB layout wirelist involves also three steps - import, auto-placement of components and auto-routing of connections.
The procedure to import a PCB Layout Wirelist file can be carried out as below